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Bill

Bill

S 4810

CHIPS Training in America Act of 2026

119th Congress Introduced by Ted Budd and 1 co-sponsor

Creates a federal grant program to expand semiconductor education/training, standardize credentials, and fund a 5-year national microelectronics workforce strategy.

Introduced in Senate
0
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Bill Summary · S 4810

Overview

S.4810, the CHIPS Training in America Act of 2026, proposes a new grant program and related administrative actions to expand education and workforce development in semiconductor manufacturing and related industries. The bill adds to the CHIPS and Science Act framework by establishing a targeted grants program, strengthening workforce strategy coordination, and ensuring a publicly accessible education/workforce clearinghouse.

Main purpose and intent

  • Create a federal grant program to develop and expand education and training for the semiconductor and microelectronics workforce.
  • Improve standardization of competency-based degree, credentialing, and certificate frameworks within semiconductor and microelectronics programs.
  • Develop and implement a national strategy for microelectronics workforce development, aligning agency activities, education systems, and funding.
  • Ensure coordination across federal agencies, states, and local workforce systems to grow a skilled domestic microelectronics workforce.

Key provisions and changes

  1. Public online clearinghouse expansion (amendment to CHIPS and Science Act)

    • Requires establishment and maintenance of a single publicly accessible online clearinghouse of microelectronics education and workforce development information.
  2. National Semiconductor Technology Center activities (policy tweak)

    • Adds a new focus area to develop competency-based degree, credentialing, and certificate frameworks to standardize workforce development.
  3. National Strategy on Microelectronics Workforce (new requirement)

    • Within one year of enactment, the Subcommittee must develop a 5-year national strategy for microelectronics workforce development.
    • The strategy must include objectives, metrics, coordination with education systems, alignment with CHIPS Act investments, and coordination with STEM and workforce initiatives.
    • Requires inclusion of high-level agency roles (Secretary of Labor, Secretary of Education, Secretary of Veterans Affairs) and ongoing reporting/updates every 5 years.
  4. Grant program for education related to semiconductor manufacturing (new Sec. 9906A)

    • Defines eligible institutions and partnerships (including institutions of higher education, vocational institutions, and area career/technical education schools) and eligible partnerships (must include an eligible institution and a State/Tribe or subdivision, plus other entities).
    • Eligible activities: establish or expand workforce development and academic programs related to semiconductor manufacturing, equipment, materials, advanced packaging, microelectronics, computer science, engineering, and related industries; can include short-term/non-credit offerings.
    • Application requirements: description of partnership, workforce needs, sustainability plan, recruitment/retention strategies for individuals with barriers to employment, and alignment with workforce pathways and credential frameworks.
    • Priority in grant selection: partnerships located in growing microelectronics ecosystems and connected with state/local workforce boards/sector partnerships.
    • Funding and duration: grants up to $7,000,000 each, for up to 5 years.
    • Federal cost share: federal share not to exceed 50% of project costs; non-federal contributions counted toward workforce and community investments.
    • Reporting: annual program reports to the National Semiconductor Technology Center (NSTC) with participant demographics, completions, and Workforce Innovation and Opportunity Act indicators; NSTC must then provide a consolidated report to Congress and make it public within 180 days.
    • Appropriations: funds to be used consistent with CHIPS and Science Act 2022 authorities for the applicable fiscal year.
  5. Prohibition on creating duplicate clearinghouse

    • Federal agencies may not establish a separate microelectronics education and workforce clearinghouse that duplicates or competes with the one authorized in the CHIPS and Science Act of 2022.

Who would be affected

  • Eligible institutions (historically undergraduate or above, including non-baccalaureate institutions, and vocational/CTE schools) and eligible partnerships partnering with industry, states, and Tribal entities.
  • Students and workers seeking training in semiconductor manufacturing, microelectronics, and related fields.
  • Federal agencies involved in labor, education, veterans affairs, and defense-related workforce programs; NSTC (National Semiconductor Technology Center) as the grant administrator.
  • States and local workforce development boards coordinating with sector partnerships.

Procedural and timeline aspects

  • National Strategy timeline: Not later than 1 year after enactment, a 5-year national strategy must be developed and updated at least every 5 years.
  • Reporting: Annual program reporting by grant recipients; NSTC to compile and report to relevant Senate/House committees within 180 days of receiving annual reports.
  • Clearinghouse: Maintains a single, public online clearinghouse and prohibits creating an alternative.
  • Grant administration: Competitive awards; maximum grant size is $7 million per award; grant duration up to 5 years; 50% federal cost-share limit.

Potential impact

  • Accelerates development of a standardized, publicly documented framework for microelectronics education and credentials.
  • Strengthens coordination across federal agencies and with state/local workforce systems to build a cohesive national strategy.
  • Expands access to semiconductor-related training, especially for underserved populations, through grants and partnerships.
  • Increases visibility and coordination of microelectronics education resources via the clearinghouse, but also restricts duplicative clearinghouse efforts to avoid fragmentation.

If you’d like, I can prepare a side-by-side comparison with existing CHIPS and Science Act provisions to highlight where S.4810 adds or modifies requirements.

Compiled from official sources — confirm details with the bill’s official record.

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